Bob Patti was interviewed by Tova Levy of Siemens for her 3D IC podcast.
Bob explains that in today’s chips, most of the power and time are consumed by interconnect — “wire” — rather than by active silicon. In addition, most of the silicon area is consumed by components that are idle.
Advanced packaging meaningfully addresses both of these problems, as described in their interesting half-hour discussion.
Here’s a two-minute snippet:
Podcast here:
The wire problem: Why advanced packaging is the only answer left as Moore’s Law runs out – Siemens Software Podcast Network
Full video here:
The wire problem: Why advanced packaging is the only answer left – YouTube
