Gordon Moore predicted that the number of transistors per square inch would continue to increase at a steady rate. Traditionally, this happened because transistors got smaller, but now advanced packaging achieves the same result by stacking layers of transistors atop one another in 2.5D or 3D assemblies. Eric Beyne of IMEC summarizes current technologies in this post: 3D Systems-on-Chip: Clever Circuit Partitioning To Extend Moore’s Law