Advanced Packaging Terminology


An advanced packaging technology that bonds dies and/or chiplets onto an interposer within a single package


An advanced packaging technology that incorporates multiple layers of circuitry into a single chip, integrated both vertically and horizontally

Carrier Wafer

A wafer that is used to hold dies or chiplets during intermediate steps, but is not a part of the finished device


A packaged integrated circuit


A very small die, designed to be mounted on an interposer before packaging


Die to Die (also die-on-die) stacking: bonding and integrating individual dies atop one another


Die to Wafer (also die-on-wafer) stacking: bonding and integrating dies onto a wafer before dicing the wafer


Direct Bond Interconnect – a bump-less hybrid bonding technology (developed by Ziptronix) practiced by NHanced


Cutting a processed semiconductor wafer into separate dies


An unpackaged integrated circuit; a rectangular piece cut (diced) from a processed wafer

Die on Wafer

See D2W

Heterogeneous Integration

The combining of different types of integrated circuitry in a single device; differences may be in process, node, substrate, or function


Integrated Circuit: an electronic circuit formed on a small piece of semiconducting material, performing the same function as a larger circuit made from discrete components

Integrated Circuit

See IC


A small piece of semiconductor material built to host and interconnect two or more dies and/or chiplets in a single package


Internet of Things: the interconnection (via the Internet) of small devices embedded in everyday objects

Moore’s Law

An observation by Gordon Moore that the number of transistors per square inch on ICs doubled every year, and the prediction that they would continue to do so

More than Moore

A catch-all phrase for technologies that attempt to bypass Moore’s Law, creating smaller, faster, or more powerful circuitry without shrinking the size of the transistor


See Process Node


A plastic structure that holds an integrated circuit and provides connections to other components

Process Node

A standardized manufacturing process that defines the size of the electrical elements and how densely they can be packed together


The semiconductor material underlying the circuitry of an IC, usually silicon

Through Silicon Via



Through Silicon Via: a vertical electrical connection that pierces the substrate


A disk of semiconductor material (usually silicon) on which circuits can be fabricated

Wafer on Wafer

See W2W


Wafer-to-Wafer (also wafer-on-wafer) stacking: bonding and integrating whole processed wafers atop one another before dicing the stack