3DICs, or three-dimensional integrated circuits, are advanced chips that incorporate multiple layers of circuitry in a single package. Unlike traditional 2D circuits, these layers are designed with vertical electrical connections – through-silicon vias (TSVs) – for inter-layer connectivity (Figure 1).
3DICs may be assembled die-on-die, die-on-wafer, or wafer-on-wafer; bonding may use thermo-compression bonding (TCB) or hybrid techniques. The performance of these intricate chips is significantly influenced by the thickness of the layers, the diameters of the TSVs, and the density of these connections (Figure 2).
What are the Benefits of 3D lCs?
In traditional 2D electronic circuits, each die is packaged separately. The packaged chips are then laid out on a printed circuit board (PCB) and interconnected by tiny wires. Figure 3 shows a classic 2D circuit board.
Compared to this traditional 2D architecture, 3DICs provide several significant advantages:
- Footprint Reduction: Stacking multiple dies vertically produces a chip that takes up less space than if those same dies were side by side on a PCB. Remarkably, if the layers are aggressively thinned, a multi-layer 3DIC is no thicker than a single 2D chip. The tiny size of 3DICs is crucial for the miniaturization of devices such as those in smartphones and IoT (Internet of Things) applications.
- Enhanced Speed: The proximity of stacked dies in a 3DIC shortens the distance electronic signals must travel, allowing them to move more quickly between components. This advantage can lead to performance speeds many times faster than traditional 2D setups.
- Improved Power Efficiency: Shorter connections automatically require less power, but 3DICs have another power-saving trick. When an electronic signal travels from one chip to another, it passes through special circuitry that screens out any accidental electrostatic discharge (ESD). These ESD filters consume energy. Signals that travel from one layer to another within a 3DIC do not require ESD protection. Tests have seen as much as 99% reduction in power consumption.
- Heterogeneous Integration: Because the layers in a 3DIC are manufactured separately, they can be built differently. This is more important than it might seem! Different layers can be optimized for specific tasks – be it enhanced capacitors or faster transistors – and even constructed using different materials. All these possibilities mean that 3DICs can combine the best of each process, node, and substrate without compromising some components to accommodate others. 3DICs can thus contain combinations that are flatly impossible to achieve on a 2D chip.
Challenges to Adoption
If 3DIC technology is so wonderful, why isn’t everybody doing it?
Despite the clear advantages, widespread adoption faces a few major hurdles. First, every die in the stack must be designed for stacking, and that design effort is considerable. If different entities are responsible for the different layers, close collaboration is essential from the initial design through the final test. Second, the manufacturing steps must be carefully coordinated. Different layers can be processed by different manufacturers, and they are most likely stacked at yet another facility.
However, in specific markets such as memories and sensors, the immediate benefits of 3DICs far outweigh the challenges, establishing precedents for future designs. As the 3DIC architecture matures, we anticipate a steady increase in ambitious, ground-breaking 3DIC projects, solidifying its status as a pivotal technology for the future.
Today, only a select few companies have mastered 3D. They have built the necessary relationships, created the supply chain, acquired the skills and experience, and produced working 3DICs.
NHanced stands at the forefront of this revolution, having mastered the intricacies of 3DIC development. Are you ready to NHance your product with cutting-edge 3DIC technology? Contact us today.
